With the sophistication of embedded devices in recent years, it has been desired to establish a technique for efficient debugging in the stages of development. The debugging of embedded devices often uses methods such as setting breakpoints with an in-circuit emulator (ICE) and performing single step execution. For systems that need to be real-time, however, such methods can fail to ensure proper timing with peripherals and are unusable in many cases.
Under the circumstances, it is of increasing importance to trace the internal operation of the devices and observe state changes and behavior. In order to reduce manufacturing cost, many embedded devices have only a small margin of built-in memory capacity and CPU performance. It is often not possible to satisfactorily use the method of keeping an operation log by software processing, which is employed in general computer apparatuses typified by servers and personal computers. Many embedded devices include application-specific system LSIs, where it is often important to observe the behavior of buses, peripheral circuits, and the like which cannot be observed by software processing alone.
In general, it is an effective technique to provide a mechanism to extract signals for investigating the operating state of a system LSI from monitor terminals, and utilize the monitor terminals to store changes in the operating state as trace data for analysis. Among the existing technologies with such a technique are “Semiconductor Integrated Circuit” described in PTL 1 and “Generation of Trace Signal in Data Processing” described in PTL 2.
FIG. 24 is a block diagram showing the internal configuration of a system LSI which is an embodiment of PTL 1. The system LSI of FIG. 24 includes an MPU core (control circuit) 91, a built-in RAM (Random Access Memory, memory circuit) 92 which contains a program for operating the MPU core 91, and a peripheral circuit 93 which transmits and receives signals to/from the MPU core 91. The system LSI is connected with a system LSI peripheral device 95. The system LSI and the system LSI peripheral device 95 transmit and receive signals to/from each other. Aside from the program for operating the MPU core 91, the built-in RAM 92 also contains a debug support function program.
A debug support circuit 914 having a built-in signal select circuit 931 is provided in the MPU core 91. A signal select circuit 932 is provided in the peripheral circuit 93. There are also provided a signal select circuit 933 which selects an ultimate monitor signal, and a monitor signal control circuit 94 which controls the select operations of the respective signal select circuits 931 to 933.
The system LSI of PTL 1 includes the signal select circuit 931 which selects any one of internal signals of the MPU core 91, the signal select circuit 932 which selects any one of internal signals of the peripheral circuit 93, and the signal select circuit 933 which selects either one of the outputs of the signal select circuits 931 and 932. The select operations of the signal select circuits 931 to 933 can be arbitrarily switched as needed. Such a configuration makes it possible to analyze the internal operation of the system LSI in real time and in detail. Even if the monitor terminals are limited, a plurality of monitor signals can be easily switched for output.
In PTL 2, the system includes a component whose operation is to be traced, and a trace generation unit that receives operation-indicating input signals from the component and generates high priority and low priority trace signals from the input signals as outputs to a trace receiving apparatus. When a suppression signal is issued from the trace receiving apparatus, the trace generation unit suppresses the occurrence of low priority trace signals to prevent the trace receiving apparatus from overflowing.